【原创】The solutional manual of the Verilog HDL: A Guide to Digital Design and Synthesis (2nd)--ch08

【原创】The solutional manual of the Verilog HDL: A Guide to Digital Design and Synthesis (2nd)--ch08

Chapter 8. Tasks and Functions

8.5 Exercises

1. Define a function to calculate the factorial of a 4-bit number. The output is a 32-bit value. Invoke the function by using stimulus and check results.

my answer:

# Factorial of 4 is 3628800

2. Define a function to multiply two 4-bit numbers a and b. The output is an 8-bit value. Invoke the function by using stimulus and check results.

my answer:

# a x b= 150

3. Define a function to design an 8-function ALU that takes two 4-bit numbers a and b and computes a 5-bit result out based on a 3-bit select signal. Ignore overflow or underflow bits.

my answer:

4. Define a task to compute the factorial of 4-bit number. The output is a 32-bit value. The result is assigned to the output after a delay of 10 time units.

my answer:

5. Define a task to compute even parity of a 16-bit number. The result is a 1-bit value that is assigned to the output after three positive edges of clock.(Hint: Use a repeat loop in the task).

my answer:

6. Using named events, tasks, and functions, design the traffic signal controller .

my answer:

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